parameter max. units i d @ t c = 25c continuous drain current, v gs @ 10v 36 i d @ t c = 100c continuous drain current, v gs @ 10v 23 a i dm pulsed drain current ? 144 p d @t c = 25c power dissipation 446 w linear derating factor 3.6 w/c v gs gate-to-source voltage 30 v dv/dt peak diode recovery dv/dt ? 3.5 v/ns t j operating junction and -55 to + 150 t stg storage temperature range soldering temperature, for 10 seconds 300 (1.6mm from case ) c smps mosfet hexfet ? power mosfet absolute maximum ratings l switch mode power supply (smps) l uninterruptable power supply l high speed power switching benefits applications l low gate charge qg results in simple drive requirement l improved gate, avalanche and dynamic dv/dt ruggedness l fully characterized capacitance and avalanche voltage and current l effective coss specified (see an 1001) v dss r ds(on) max i d 500v 0.13 w 36a typical smps topologies l full bridge converters l power factor correction boost notes ? through ? are on page 8 IRFPS37N50A www.irf.com 1 12/14/99 super-247 pd- 91822c
IRFPS37N50A 2 www.irf.com parameter min. typ. max. units conditions g fs forward transconductance 20 CCC CCC s v ds = 50v, i d = 22a q g total gate charge CCC CCC 180 i d = 36a q gs gate-to-source charge CCC CCC 46 nc v ds = 400v q gd gate-to-drain ("miller") charge CCC CCC 71 v gs = 10v, see fig. 6 and 13 ? t d(on) turn-on delay time CCC 23 CCC v dd = 250v t r rise time CCC 98 CCC i d = 36a t d(off) turn-off delay time CCC 52 CCC r g = 2.15 w t f fall time CCC 80 CCC r d = 7.0 w ,see fig. 10 ? c iss input capacitance CCC 5579 CCC v gs = 0v c oss output capacitance CCC 810 CCC v ds = 25v c rss reverse transfer capacitance CCC 36 CCC pf ? = 1.0mhz, see fig. 5 c oss output capacitance CCC 7905 CCC v gs = 0v, v ds = 1.0v, ? = 1.0mhz c oss output capacitance CCC 221 CCC v gs = 0v, v ds = 400v, ? = 1.0mhz c oss eff. effective output capacitance CCC 400 CCC v gs = 0v, v ds = 0v to 400v ? parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage 500 CCC CCC v v gs = 0v, i d = 250a r ds(on) static drain-to-source on-resistance CCC CCC 0.13 w v gs = 10v, i d = 22a ? v gs(th) gate threshold voltage 2.0 CCC 4.0 v v ds = v gs , i d = 250a CCC CCC 25 a v ds = 500v, v gs = 0v CCC CCC 250 v ds = 400v, v gs = 0v, t j = 150c gate-to-source forward leakage CCC CCC 100 v gs = 30v gate-to-source reverse leakage CCC CCC -100 na v gs = -30v static @ t j = 25c (unless otherwise specified) i gss i dss drain-to-source leakage current dynamic @ t j = 25c (unless otherwise specified) ns parameter typ. max. units e as single pulse avalanche energy ? CCC 1260 mj i ar avalanche current ? CCC 36 a e ar repetitive avalanche energy ? CCC 44 mj avalanche characteristics s d g parameter min. typ. max. units conditions i s continuous source current mosfet symbol (body diode) CCC CCC showing the i sm pulsed source current integral reverse (body diode) ? CCC CCC p-n junction diode. v sd diode forward voltage CCC CCC 1.5 v t j = 25c, i s = 36a, v gs = 0v ? t rr reverse recovery time CCC 570 860 ns t j = 25c, i f = 36a q rr reverse recoverycharge CCC 8.6 13 c di/dt = 100a/s ? t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) diode characteristics 36 144 a parameter typ. max. units r q jc junction-to-case CCC 0.28 r q cs case-to-sink, flat, greased surface 0.24 CCC c/w r q ja junction-to-ambient CCC 40 thermal resistance
IRFPS37N50A www.irf.com 3 fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics 0.1 1 10 100 1000 0.1 1 10 100 20 s pulse width t = 25 c j top bottom vgs 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v 4.5v v , drain-to-source voltage (v) i , drain-to-source current (a) ds d 4.5v 1 10 100 0.1 1 10 100 20 s pulse width t = 150 c j top bottom vgs 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v 4.5v v , drain-to-source volta g e (v) i , drain-to-source current (a) ds d 4.5v 1 10 100 1000 4.0 5.0 6.0 7.0 8.0 9.0 v = 50v 20s pulse width ds v , gate-to-source voltage (v) i , drain-to-source current (a) gs d t = 25 c j t = 150 c j -60 -40 -20 0 20 40 60 80 100 120 140 160 0.0 0.5 1.0 1.5 2.0 2.5 3.0 t , junction temperature ( c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d 10v 36a
IRFPS37N50A 4 www.irf.com fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 0 40 80 120 160 200 0 4 8 12 16 20 q , total gate charge (nc) v , gate-to-source voltage (v) g gs for test circuit see figure i = d 13 36a v = 100v ds v = 250v ds v = 400v ds 0.1 1 10 100 1000 0.2 0.4 0.6 0.8 1.0 1.2 1.4 v ,source-to-drain volta g e (v) i , reverse drain current (a) sd sd v = 0 v gs t = 25 c j t = 150 c j 1 10 100 1000 10 100 1000 10000 operation in this area limited by r ds(on) sin g le pulse t t = 150 c = 25 c j c v , drain-to-source volta g e (v) i , drain current (a) i , drain current (a) ds d 10us 100us 1ms 10ms 10 100 1000 10000 100000 1 10 100 1000 c, capacitance (pf) ds v , d rain-to-source volta g e ( v ) a v = 0v , f = 1mhz c = c + c , c shorted c = c c = c + c gs is s g s g d ds rss g d oss ds g d c iss c oss c rss
IRFPS37N50A www.irf.com 5 fig 10a. switching time test circuit v ds 90% 10% v gs t d(on) t r t d(off) t f fig 10b. switching time waveforms v ds pulse width 1 s duty factor 0.1 % r d v gs r g d.u.t. 10v + - v dd fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature 0.001 0.01 0.1 1 0.00001 0.0001 0.001 0.01 0.1 1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response) 25 50 75 100 125 150 0 10 20 30 40 t , case temperature ( c) i , drain current (a) c d
IRFPS37N50A 6 www.irf.com q g q gs q gd v g charge d.u.t. v ds i d i g 3ma v gs .3 m f 50k w .2 m f 12v current regulator same type as d.u.t. current sampling resistors + - 10 v fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 w t p d.u.t l v ds + - v dd driver a 15v 20v 25 50 75 100 125 150 0 500 1000 1500 2000 2500 3000 starting t , junction temperature ( c) e , single pulse avalanche energy (mj) j as i d top bottom 16a 23a 36a fig 12d. typical drain-to-source voltage vs. avalanche current 500 520 540 560 580 0 10203040 a dsav av i , avalanche current ( a ) v , avalanche voltage (v)
IRFPS37N50A www.irf.com 7 p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - fig 14. for n-channel hexfet ? power mosfets * v gs = 5v for logic level devices peak diode recovery dv/dt test circuit ? ? ? r g v dd dv/dt controlled by r g driver same type as d.u.t. i sd controlled by duty factor "d" d.u.t. - device under test d.u.t circuit layout considerations low stray inductance ground plane low leakage inductance current transformer ? *
IRFPS37N50A 8 www.irf.com world headquarters: 233 kansas st., el segundo, california 90245, tel: (310) 252-7105 ir great britain: hurst green, oxted, surrey rh8 9bb, uk tel: ++ 44 1883 732020 ir canada: 15 lincoln court, brampton, ontario l6t3z2, tel: (905) 453 2200 ir germany: saalburgstrasse 157, 61350 bad homburg tel: ++ 49 6172 96590 ir italy: via liguria 49, 10071 borgaro, torino tel: ++ 39 11 451 0111 ir japan: k&h bldg., 2f, 30-4 nishi-ikebukuro 3-chome, toshima-ku, tokyo japan 171 tel: 81 3 3983 0086 ir southeast asia: 1 kim seng promenade, great world city west tower, 13-11, singapore 237994 tel: ++ 65 838 4630 ir taiwan: 16 fl. suite d. 207, sec. 2, tun haw south road, taipei, 10673, taiwan tel: 886-2-2377-9936 data and specifications subject to change without notice. 12/99 case outline and dimensions super-247 dimensions are shown in millimeters ? repetitive rating; pulse width limited by max. junction temperature. ( see fig. 11 ) ? i sd 36a, di/dt 145a/s, v dd v (br)dss , t j 150c notes: ? starting t j = 25c, l = 1.94mh r g = 25 w , i as = 36a. (see figure 12) ? pulse width 300s; duty cycle 2%. ? c oss eff. is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss ** when mounted on 1" square pcb (fr-4 or g-10 material ) . for recommended footprint and soldering techniques refer to application note #an-994
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